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general description the dg201a and dg211 are normally closed, quad single-pole single-throw (spst) analog switches. these cmos switches can be continuously operated with power supplies ranging from ?.5v to ?8v. maxim guarantees that these switches will not latch up if the power supplies are disconnected with input signals still connected. both devices have guaranteed break-before-make switching. the dg201a differs from the dg211 primari- ly in switching speeds. the dg201a has a maximum turn-off time of 450ns and a maximum turn-on time of 600ns. the dg211 has a maximum turn-off time of 500ns and a maximum turn-on time of 1000ns. compared to the original manufacturer? products, maxim? dg201a and dg211 consume significantly lower power making them better suited for portable applications. maxim has also eliminated the need for the third (v l ) power supply that is required for the oper- ation of the original manufacturer? dg211. applications winchester disk drives test equipment communications systems pbx, pabx guidance and control systems head up displays military radios features ? guaranteed ?.5v to ?8v operation ? no v l supply required ? nonlatching with supplies turned off and input signals present ? cmos and ttl logic compatible ? monolithic, low-power cmos design dg201a/dg211 quad spst cmos analog switches ________________________________________________________________ maxim integrated products 1 top view dip/so/tssop logic switch 0 1 on off 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 in2 d2 s2 v+ v- s1 d1 in1 dg201a dg211 n.c. s3 d3 in3 in4 d4 s4 gnd pin configurations ordering information 19-3959; rev 2; 5/06 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin-package dg201a cue 0 c to +70 c 16 tssop dg201acse 0 c to +70 c 16 so dg201acj 0 c to +70 c 16 plastic dip dg201c/d 0 c to +70 c dice dg201aege -40 c to +85 c 16 qfn (5 ? 5) dg201aeue -40 c to +85 c 16 tssop dg201ady -40 c to +85 c 16 so dg201adj -40 c to +85 c 16 plastic dip dg201aak -55 c to +125 c 16 cerdip dg201abk -25 c to +85 c 16 cerdip dg211 cue 0 c to +70 c 16 tssop dg211cse 0 c to +70 c 16 so dg211cj 0 c to +70 c 16 plastic dip dg211c/d 0 c to +70 c dice dg211ege -40 c to +85 c 16 qfn (5 ? 5) dg211eue -40 c to +85 c 16 tssop dg211dy -40 c to +85 c 16 so dg211dj -40 c to +85 c 16 plastic dip 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 +15v dg201a dg211 -15v v in x 10v * * * * 5k ? 10k ? 40k ? 20k ? 5k ? v out programmable gain amplifier note: *pins 1, 8, 9, and 16 are logic control inputs t ypical operating circuit pin configurations continued at end of data sheet.
dg201a/dg211 quad spst cmos analog switches 2 _______________________________________________________________________________________ absolute maximum ratings (dg211) electrical characteristics (dg211) (v+ = +15v, v- = -15v, gnd = 0, t a = +25?, unless otherwise noted.) (for more information on typ values see note 2.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v+ to v-?.............44v v in to ground..................? ...v-, v+ v l to ground?...................?-0.3v, 25v v s or v d to v+...........................?, -40v v s or v d to v-?.......................?.0, 40v v+ to ground?..................................?..25v v- to ground.................?..-25v current, any terminal except s or d?...............30ma continuous current, s or d..............?..20ma peak current, s or d (pulsed at 1ms 10% duty cycle max)?.........................70ma storage temperature range?...-65? to +125? operating temperature range dg211c ................................?.....0? to +70? dg211d/e .........................?.....-40? to +85? power dissipation (t a = +70?) (note 1) 16-pin plastic dip (derate 10.5mw/? above +70?) ..842mw 16-pin narrow so (derate 8.3mw/? above+70?). ....696mw 16-pin tssop (derate 9.4mw/? above +70?) ..........755mw 16-pin qfn (5 ? 5) (derate 19.2mw/? above +70?) .........................1538mw parameter symbol conditions min typ max units switch analog signal range v analog -15 15 v drain-source on-resistance r ds ( on ) v d = ?0v, v in = 0.8v, i s = 1ma 115 175 ? v s = 14v, v d = -14v 0.01 5.0 source off-leakage current i s ( off ) v in = 2.4v v s = -14v, v d = 14v -5.0 -0.02 v s = 14v, v d = -14v 0.01 5.0 drain off-leakage current i d ( off ) v in = 2.4v v s = -14v, v d = 14v -5.0 -0.02 v s = v d = -14v 0.1 5.0 drain on-leakage current (note 3) i d (on) v in = 0.8v v s = v d = -14v -5.0 -0.15 na input v in = 2.4v -1.0 -0.0004 input current with input voltage high i inh v in = 15v 0.003 1.0 input current with input voltage low i inl v in = 0 -1.0 -0.0004 ? dynamic turn-on time t on 460 1000 t off1 360 500 turn-off time t off2 see switching time test circuit v s = 2v, r l = 1k ? , c l = 35pf 450 ns source off-capacitance c s ( off ) v s = 0, v in = 5v, f = 1mhz 5 drain off-capacitance c d ( off ) v d = 0, v in = 5v, f = 1mhz 5 channel on-capacitance c d + s ( on ) v d = v s = 0, v in = 0, f = 1mhz 16 pf off-isolation (note 4) oirr 70 crosstalk (channel to channel) ccrr v in = 5v, r l = 1k ? , c l = 15pf, v s = 1vrms, f = 100khz 90 db note 1: device mounted with all leads soldered to pc board.
dg201a/dg211 quad spst cmos analog switches _______________________________________________________________________________________ 3 absolute maximum ratings (dg201a) voltages reference to v- v+..?.44v gnd?.?.25v digital inputs (note 1), v s , v d ............................-2v to (v+ + 2v) or 20ma, whichever occurs first current, any terminal except s or d?.?...30ma continuous current, s or d?..20ma peak current, s or d (pulsed at 1ms 10% duty cycle max).70ma operating temperature range dg201aa .....................?.?..-55? to +125? dg201ad/e .........?....?.??40? to +85? dg201ac .............?........................?? to +70? storage temperature range..?.-65? to +150? power dissipation (note 2) 16-pin plastic dip (derate 10. 5mw/? above +70?) ... 842mw 16-pin so (derate 8. 7mw/? above +70?) .................696mw 16-pin tssop (derate 9. 4mw/? above +70?) ...........755mw 16-pin qfn (5 ? 5) ( derate 19.2mw/? above +70?) ...........................1538mw 16-pin cerdip (derate 10.0mw/? above +70?)......800mw stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. dg201aa dg201ac, d, e parameter symbol conditions min typ max min typ max units switch analog signal range v analog -15 15 -15 15 v drain-source on resistance r ds ( on ) v d = ?0v, v in = 0.8v, i s = 1ma 115 175 115 200 ? electrical characteristics (dg201a) (v+ = +15v, v- = -15v, gnd = 0, t a = +25? , unless otherwise noted.) (for more information on typ values see note 3.) electrical characteristics (dg211) (continued) (v+ = +15v, v- = -15v, gnd = 0, t a = +25?, unless otherwise noted.) (for more information on typ values see note 2.) parameter symbol conditions min typ max units supply positive supply current i + 0.02 0.4 negative supply current i - 0.01 0.4 logic supply current i l v in = 0 and 2.4v (all) 00 ma power-supply range for continous operation v op ?.5 ?8 v note 1: signals on s _ , d _ , or in _ exceeding v + or v - on maxim? dg201a will be clamped by internal diodes, and are also internally cur- rent limited to 25ma. note 2: device mounted with all leads soldered to pc board. note 2: typical values are for design aid only, not guaranteed nor subject to production testing. note 3: i d(on) is leakage from driver into ?n?switch. note 4: off-isolation = 20 log v s /v d , v s = input to off switch, v d = output.
dg201a/dg211 quad spst cmos analog switches 4 _______________________________________________________________________________________ note 3: typical values are for design aid only, not guaranteed nor subject to production testing. note 4: i d (on) is leakage from driver into ?n?switch. dg201aa dg201ac, d, e parameter symbol conditions min typ max min typ max units input v in = 2.4v -1.0 -1.0 input current with input voltage high i inh v in = 15v 1.0 1.0 input current with input voltage low i inl v in = 0+ -1.0 -1.0 ? dynamic turn-on time t on 480 600 480 600 turn-off time t off1 see figure 1 switching time test circuit 370 450 370 450 ns charge injection q c l = 1000pf, v gen = 0, r gen = 0 20 20 pc source off-capacitance c s ( off ) 55 drain off-capacitance c d ( off ) v s = 0, v in = 5v 55 channel on-capacitance c d ( on ) + c s ( on ) v d = v s = 0, v in = 0 f = 140khz 16 16 pf off-isolation v in = 5v, z l = 75 ? supply positive supply current i + all channels on or off 0.02 0.1 0.02 0.1 ma negative supply current i - all channels on or off -0.1 -0.01 -0.1 -0.01 power-supply range for continuous operation v op ?.5 ?8 ?.5 ?8 v electrical characteristics (dg201a) (continued) (v+ = +15v, v- = -15v, gnd = 0, t a = +25? , unless otherwise noted.) (for more information on typ values see note 3.)
_______________________________________________________________________________________ 5 dg201a/dg211 quad spst cmos analog switches electrical characteristics (dg201a) (v+ = +15v, v- = -15v, gnd = 0, t a = full opearting temperature range , unless otherwise noted.) (for more information on typ values see note 3.) dg201aa dg201ac, d, e parameter symbol conditions min typ max min typ max units switch analog signal range v analog -15 15 -15 15 v d r ai n- s our ce on resi sta nce ( n ote 5) r ds ( on ) v d = ?0v, v in = 0.8v, i s = 1ma 250 250 ? input v in = 2.4v -1.0 -1.0 input current with input voltage high i inh v in = 15v 1.0 1.0 input current with input voltage low i inl v in = 0 -1.0 -1.0 ? note 5: electrical characteristics, such as on-resistance, will change when power supplies other than ?5v, are used. note 6: i d (on) is leakage from driver into ?n?switch. pin dip/so/tssop qfn name function 1, 16, 9, 8 15, 14, 7, 6 in1?n4 input 2, 15, 10, 7 16, 13, 8, 5 d1?4 analog switch drain terminal 3, 14, 11, 6 1, 12, 9, 4 s1?4 analog switch source terminal 42 v- negative-supply voltage input 53 gnd ground 12 10 n.c. no connection 13 11 v+ positive-supply voltage input?onnected to substrate pin description switching time test circuit switch output waveform shown for v s = constant with logic input waveform as shown. note that v s may be +ve or -ve as per switching times test circuit. v o is the steady state output with switch on. feedthrough via gate capacitance may result in spikes at leading and trailing edge of output waveform.
dg201a/dg211 quad spst cmos analog switches 6 _______________________________________________________________________________________ r ds(on) at analog signal level power supplies -5v +5v -10v +10v -15v +15v ?v 350 ? 380 ? ?0v 165 ? 250 ? ?5v 125 ? 160 ? 135 ? 155 ? typical r ds(on) vs. power supplies for maxim? dg201a, and dg211 protecting against fault conditions fault conditions occur when power supplies are turned off when input signals are still present, or when over- voltages occur at the inputs during normal operation. in either case, source-to-body diodes can be forward biased and conduct current from the signal source. if this current is required to be kept to low (a) levels then the addition of external protection diodes is rec- ommended. to provide protection for overvoltages up to 20v above the supplies, a 1n4001 or 1n914 type diode should be placed in series with the positive and negative supplies as shown in figure 2. the addition of these diodes will reduce the analog signal range to 1v below the posi- tive supply and 1v above the negative supply. 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 dg201a dg211 in4001 -15v in4001 +15v figure 2. protection against fault conditions logic "0" - sw on 3v v s 0 logic input t f < 20ns t r < 20ns switch input switch output 50% 0 v 0 0.9 t on v 0 v 0 0.9 0.1 t off1 t off2 ? switch input s 1 v s = +2v in 1 logic input gnd 0 v- -15v +15v v + d 1 r l 1k ? c l 35pf v 0 switch output (repeat test for in 2 , in 3 , and in 4 ) v 0 = v s r l r l + r ds(on) top view 16 15 14 13 5 1 2 3 4 12 11 10 9 678 s1 v- gnd s4 s2 v+ n.c. s3 d1 in1 in2 d2 d4 in4 in3 d3 dg201a dg211 qfn* pin configurations (continued) figure 1. switching time
dg201a/dg211 quad spst cmos analog switches _______________________________________________________________________________________ 7 soicn .eps package outline, .150" soic 1 1 21-0041 b rev. document control no. approval proprietary information title: top view front view max 0.010 0.069 0.019 0.157 0.010 inches 0.150 0.007 e c dim 0.014 0.004 b a1 min 0.053 a 0.19 3.80 4.00 0.25 millimeters 0.10 0.35 1.35 min 0.49 0.25 max 1.75 0.050 0.016 l 0.40 1.27 0.394 0.386 d d min dim d inches max 9.80 10.00 millimeters min max 16 ac 0.337 0.344 ab 8.75 8.55 14 0.189 0.197 aa 5.00 4.80 8 n ms012 n side view h 0.244 0.228 5.80 6.20 e 0.050 bsc 1.27 bsc c h e e b a1 a d 0 -8 l 1 variations: package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
dg201a/dg211 quad spst cmos analog switches 8 _______________________________________________________________________________________ pdipn.eps package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
dg201a/dg211 quad spst cmos analog switches _______________________________________________________________________________________ 9 cdips.eps package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
dg201a/dg211 quad spst cmos analog switches 10 ______________________________________________________________________________________ tssop4.40mm.eps package outline, tssop 4.40mm body 21-0066 1 1 g package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
dg201a/dg211 quad spst cmos analog switches ______________________________________________________________________________________ 11 32l qfn.eps package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
dg201a/dg211 quad spst cmos analog switches maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2006 maxim integrated products is a registered trademark of maxim integrated products, inc. package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .)
login | register english ? ???? ? ??? ? ??? what's new products solutions design appnotes support sales about us members maxim > products > [analog switches and multiplexers] [military/aerospace] dg201a, dg211 quad spst cmos analog switches quickview technical documents ordering info more information user comments (0) all ordering information notes: 1. other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales. 2. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 3. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: seefull data sheet or part naming conventions. 4. * some packages have variations, listed on the drawing. "pkgcode/variation" tells which variation the product uses. note that "+", "#", "-" in the part number suffix describes rohs status. package drawings may show a different suffix character. devices: 1-55 of 55 dg201a free sample buy package: type pins footprint drawing code/var * temp rohs/lead-free? materials analysis
dg201ack ceramic dip;16 pin; dwg: 21-0045 (pdf) use pkgcode/variation: j16-3* 0c to +70c rohs/lead-free: no materials analysis dg201adk ceramic dip;16 pin; dwg: 21-0045 (pdf) use pkgcode/variation: j16-3* -40c to +85c rohs/lead-free: no materials analysis dg201abk ceramic dip;16 pin; dwg: 21-0045 (pdf) use pkgcode/variation: j16-3* -20c to +85c rohs/lead-free: no materials analysis dg201aak/hr ceramic dip;16 pin; dwg: 21-0045 (pdf) use pkgcode/variation: j16-3* -55c to +125c rohs/lead-free: no materials analysis dg201aak ceramic dip;16 pin; dwg: 21-0045 (pdf) use pkgcode/variation: j16-3* -55c to +125c rohs/lead-free: no materials analysis dg201aak/883b ceramic dip;16 pin; dwg: 21-0045 (pdf) use pkgcode/variation: j16-3* -55c to +125c rohs/lead-free: no materials analysis dg201ac/d see data sheet dg201aal/883b fpck;16 pin; dwg: 21-0013 (pdf) use pkgcode/variation: f16-3* -55c to +125c see data sheet dg201aaz/883b lcc;20 pin; dwg: 21-0658 (pdf) use pkgcode/variation: l20-3* -55c to +125c rohs/lead-free: no materials analysis dg201adj+ pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16+1* -40c to +85c rohs/lead-free: lead free materials analysis dg201acj pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16-1* 0c to +70c rohs/lead-free: no materials analysis
dg201acj-2 pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16-1* 0c to +70c rohs/lead-free: no materials analysis dg201acj+ pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16+1* 0c to +70c rohs/lead-free: lead free materials analysis dg201adj pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16-1* -40c to +85c rohs/lead-free: no materials analysis dg201abj-2 pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16-1* -20c to +85c rohs/lead-free: no materials analysis dg201aese+ soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16+3* -40c to +85c rohs/lead-free: lead free materials analysis dg201aese+t -40c to +85c see data sheet dg201ady-c30037 soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* -40c to +85c rohs/lead-free: no materials analysis dg201acse soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* 0c to +70c rohs/lead-free: no materials analysis DG201ACSE-T soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* 0c to +70c rohs/lead-free: no materials analysis dg201acse+t soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16+3* 0c to +70c rohs/lead-free: lead free materials analysis dg201acse+ soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16+3* 0c to +70c rohs/lead-free: lead free materials analysis
dg201ady-t soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* -40c to +85c rohs/lead-free: no materials analysis dg201ady+t soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16+3* -40c to +85c rohs/lead-free: lead free materials analysis dg201aese-t -40c to +85c see data sheet dg201aese soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* -40c to +85c rohs/lead-free: no materials analysis dg201ady soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* -40c to +85c rohs/lead-free: no materials analysis dg201ady+ soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16+3* -40c to +85c rohs/lead-free: lead free materials analysis dg211 free sample buy package: type pins footprint drawing code/var * temp rohs/lead-free? materials analysis dg211c/d see data sheet dg211dj+ pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16+1* -40c to +85c rohs/lead-free: lead free materials analysis dg211cj-2 pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16-1* 0c to +70c rohs/lead-free: no materials analysis dg211cj+ pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16+1* 0c to +70c rohs/lead-free: lead free materials analysis
dg211cj pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16-1* 0c to +70c rohs/lead-free: no materials analysis dg211dj pdip;16 pin; dwg: 21-0043 (pdf) use pkgcode/variation: p16-1* -40c to +85c rohs/lead-free: no materials analysis dg211ege qfn;16 pin; dwg: 21-0091 (pdf) use pkgcode/variation: g1655-3* -40c to +85c rohs/lead-free: no materials analysis dg211ege-t -40c to +85c see data sheet dg211cse soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* 0c to +70c rohs/lead-free: no materials analysis dg211cy+t 0c to +70c see data sheet dg211cy+ soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16+3* 0c to +70c rohs/lead-free: lead free materials analysis dg211cse-2 soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* 0c to +70c rohs/lead-free: no materials analysis dg211cy-t soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* 0c to +70c rohs/lead-free: no materials analysis dg211cse+ soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16+3* 0c to +70c rohs/lead-free: lead free materials analysis dg211cse+t soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16+3* 0c to +70c rohs/lead-free: lead free materials analysis
dg211cse-t soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* 0c to +70c rohs/lead-free: no materials analysis dg211cy soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* 0c to +70c rohs/lead-free: no materials analysis dg211dy-t soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* -40c to +85c rohs/lead-free: no materials analysis dg211dy+t soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16+3* -40c to +85c rohs/lead-free: lead free materials analysis dg211dy soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16-3* -40c to +85c rohs/lead-free: no materials analysis dg211dy+ soic;16 pin; dwg: 21-0041 (pdf) use pkgcode/variation: s16+3* -40c to +85c rohs/lead-free: lead free materials analysis dg211cue+ tssop;16 pin; dwg: 21-0066 (pdf) use pkgcode/variation: u16+2* 0c to +70c rohs/lead-free: lead free materials analysis dg211cue+t tssop;16 pin; dwg: 21-0066 (pdf) use pkgcode/variation: u16+2* 0c to +70c rohs/lead-free: lead free materials analysis dg211eue+ tssop;16 pin; dwg: 21-0066 (pdf) use pkgcode/variation: u16+2* -40c to +85c rohs/lead-free: lead free materials analysis dg211eue+t tssop;16 pin; dwg: 21-0066 (pdf) use pkgcode/variation: u16+2* -40c to +85c rohs/lead-free: lead free materials analysis dg211eue-t -40c to +85c see data sheet
dg211eue tssop;16 pin; dwg: 21-0066 (pdf) use pkgcode/variation: u16-2* -40c to +85c see data sheet materials analysis didn't find what you need? l next day product selection assistance from applications engineers l parametric search l applications help quickview technical documents ordering info more information description key features applications/uses key specifications diagram data sheet application notes design guides engineering journals reliability reports software/models evaluation kits price and availability samples buy online package information lead-free information related products notes and comments evaluation kits document ref.: 19-3959; rev 2; 2006-10-13 this page last modified: 2007-05-30 contact us: feedback, questions rate this page mail this page privacy policy ? legal notices copyright ? 2009 by maxim integrated products, dallas semiconductor

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